1. Technical Field
The present invention relates to a semiconductor device.
2. Related Art
In recent years, a type of semiconductor device called “system in package” (SIP) including a plurality of semiconductor chips mounted on a substrate is widely applied to various types of electronic equipments, in addition to a type of semiconductor device called system on chip (SOC). Since a combination of existing semiconductor chips can be utilized in the SIP device, it is often the case that the SIP device is more advantageous than SOC device, in view of reducing a manufacturing cost and a turn around time (TAT) for development. Consequently, the SIP device is a more promising semiconductor device than the SOC device.
In the meantime, typical SIP device is generally provided with a heat sink for efficiently releasing heat generated in the semiconductor chip to the outside thereof. Such heat sink is generally provided to cover the whole of the multiple semiconductor chips mounted on the substrate. Typical semiconductor devices including such heat sink are described in Japanese Laid-open patent publication No. 2001-203292 (patent document 1), Japanese Patent publication No. 3228339 (patent document 2), and U.S. Pat. No. 6,259,155 (patent document 3).
In a semiconductor device described in the patent document 1, semiconductor chips are mounted on a ball grid allay (BGA) substrate, and a heat spreader (heat sink) is provided above thereof. In addition, in semiconductor devices described in the patent documents 2, 3, semiconductor chips and chip-shaped electrical components are mounted on a substrate, and a heat sink is provided above thereof. In particular in a semiconductor device described in the patent document 3, a level (height from the substrate) of the top surface of the semiconductor chip is lower than a level of the top surface of the chip-shaped electrical component. The above-described heat sinks have a general structure, in which a portion thereof facing the semiconductor chip is protruded, and therefore a portion thereof located above the semiconductor chip is thicker than other portions.